Preliminary Syllabus:
Spring 2012 EE380 (AKA CS380)
Computer Organization and Design
(also listed as "Microcomputer Organization")

Instructor: Professor Hank Dietz
Office: 203 Davis Marksbury Building
Email: hankd@engr.uky.edu
Home URL: http://aggregate.org/hankd/
Course URL: http://aggregate.org/EE380
Course Meetings: TR 12:30-1:45 in 320 Chemistry-Physics Building
Course Text: Any of the following four textbook editions is usable:
ISBN 978-0-12-374493-7 Computer Organization & Design, The Hardware/Software Interface, Fourth Edition, Patterson & Hennessy, Morgan Kaufmann publisher, 4th Edition, 2009. (This is the version the bookstore is stocking.)
ISBN 978-0-12-370606-5, Computer Organization & Design, The Hardware/Software Interface, Third Edition Revised, Patterson & Hennessy, Morgan Kaufmann publisher, 3rd Edition Revised, 2007.
ISBN 1-55860-604-1, Computer Organization & Design, The Hardware/Software Interface, Third Edition, Patterson & Hennessy, Morgan Kaufmann publisher, 3rd Edition, 2004.
Computer Organization & Design (second edition), The Hardware/Software Interface, Patterson & Hennessy, Morgan Kaufmann publisher, 2nd Edition, 1997.

Overview

EE380 is the undergraduate computer area core course and a key course for anyone interested in computer engineering. The course serves as an introduction to the design and analysis of modern computer architectures. It is expected that students entering this course will have some high-level language programming experience and basic understanding of digital logic (as per EE280).

Course Content

A very approximate overview of the lecture coverage, in "lecture weeks," is given in the following table. Note that the reference chapters do not contain all the material covered in lectures; you are expected to understand any material discussed in the lectures, cited from references, or presented via the course URL.

Topic 2nd Ed. Reference 3rd Ed. Reference Weeks
Introduction Chapter 1 Chapter 1 1.5
A Simple Machine Appendix B Appendix B 1.5
Performance Chapter 2 Chapter 4 0.5
Machine Language Chapter 3; Appendix A Chapter 2; Appendix A, D 1.5
Arithmetic Chapter 4 Chapter 3 2
Data Path & Control Chapter 5; Appendix C Chapter 5; Appendix C 1
Pipelining Chapter 6 Chapter 6 1.5
Memory Hierarchy & I/O Chapters 7,8 Chapter 7,8 1.5
Parallel Processing Chapter 9 Chapter 9 1

The textbook for this course is excellent and we will follow it fairly closely. However, there is a severe discontinuity going from chapter 1 to chapter 2 in the 2nd edition, which the 3rd edition tries to reduce by re-arranging the chapters somewhat (and some 3rd edition material is on CDROM). The 3rd edition revised is not substantially different from the 3rd edition in this respect. The 4th edition does a bit more reorganization, primarily elimination of the performance chapter and collapsing the the two chapters about processor design into one; there is also a new appendix about GPUs and the text references more recent systems in general. In summary, it is still pretty much the same book in all four of these editions, and the differences are largely hidden by what we present in the online notes and in class.

Although the 4th edition smooths over it better, the discontinuity after chapter 1 is still an issue. To solve this problem, we insert a simple machine implementation after chapter 1, using notes and custom software created here. I like most of the 4th edition changes. The old chapters on performance analysis and the single-cycle design were the weakest -- and now they're gone -- but they can't really be gone from the presentation because they do contain things you need to know. The result is a slight shift in emphasis, with less about performance analysis and more about disk I/O. Most of the other material presented outside the scope of the text can be viewed as "modernization" of the ideas and examples. For example, we will discuss some of the new ideas used in the latest processor designs and you also will be introduced to the basic concepts of cluster computing and GPUs (Graphics Processing Units).

Homework, Projects, Quizzes, & Exams

Various homework/projects will be assigned. Generally, these must be submitted via the WWW forms at the course site; computer use will be discussed in lectures and at the course URL. Detailed grading may be done on only a subset of the work assigned. Simple quizzes may be given in class to confirm your attentiveness and help tailor the presentation to better meet student interests and needs.

Professor Dietz tries to minimize travel during the semester, but on January 26 he will be presenting a paper at the IS&T/SPIE Electronic Imaging conference. The class for that day will either be cancelled and made-up later or taught by a guest lecturer. Watch the course website for such information.

There will be two 1-hour in-class exams and a 2-hour comprehensive final. The schedule for the two in-class exams will be announced in class and at the course URL. Final exams are scheduled by the office of the registrar . The Spring 2012 EE380 final is listed as 8:00AM Wednesday, May 2, 2012. Although we will try to accomodate requests to take in-class or final exams at other than the scheduled times, such requests generally will be considered only if made in writing or email at least a week before the scheduled exam time, and the course staff may decide to use a different format (e.g., an oral exam) for exams given at times other than those scheduled.

We reserve the right to adjust weightings, but the first two exams will count for about 20% of your grade each, the final will count for about 40%, and 20% of your grade will be based on the other assignments and quizzes. So that any grading errors can be consistently corrected for all students, regrade requests (preferably in writing) must be made promptly and must be specific as to the reason a regrade is requested. Any work submitted for regrade may be re-evaluated in its entirety.

Although students are encouraged to discuss course material with one another, everything you submit must be entirely your own original work. UK guidelines dictate that violation of this policy will result in all involved students failing the course; more severe penalties also may be applied. Contact Professor Dietz before submitting work if you have any doubts about how this policy might apply.


EE380 Computer Organization and Design.