Hardware Barrier Synchronization For A Cluster Of Personal Computers+

T. Muhammad

MS Thesis Defense

School of Electrical Engineering
Purdue University
West Lafayette, IN 47907-1285
February 2, 1995

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+ This work was supported in part by the Office of Naval Research (ONR) under grant number N00014-91-J-4013.

Clustering

Parallel Processing

Cluster Computing Latencies

Barrier Synchronization

  1. Signal present at barrier
  2. Wait for all participating processors
  3. When all have arrived, resume execution

Other Hardware Barriers

Static Vs. Dynamic Barriers

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Barrier Groups (Masks)

Theoretical Barrier Work At Purdue

1987
Basic Concepts of barrier MIMD
Compiler technology based on VLIW scheduling
1990
SBM using a "barrier processor" and mask queue
DBM using a "barrier processor" and associative mask memory
Compiler technology based on timing analysis
1993
Improved DBM design with runtime partitioning support

Experimental Barrier Work At Purdue

1987
PASM implements SBM
1987
CARP (Compiler-oriented Architecture Research at Purdue)
Machine design: barrier MIMD using custom VLSI
1993
CARDBoard (Compiler-oriented Architecture Research Demonstration Board)
System design: DBM using RISC microprocessors in a custom board
1994
PAPERS (Purdue's Adapter for Parallel Execution and Rapid Synchronization)
Cluster design: DBM using PCs and an external adapter
PAPERS0 implements improved DBM

Original Concept Of CARD Barrier Hardware

Basic CARD DBM Design

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Problems With The Basic CARD DBM Design

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Improved CARD DBM Design

Improved CARD DBM Design

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Why PAPERS?

Generic PAPERS Cluster Concept

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What Hardware Interface?

Problems

PAPERS Barrier Logic (For One Processor)

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Parallel Interrupts?

Interrupt Architecture For PAPERS

The Two Interrupt Mask Alternatives

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Generic PAPERS Block Diagram

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PAPERS0 Implementation

PAPERS0 Logic Schematic

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PAPERS0 Display Schematic

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Performance Of PAPERS0

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What Can A PAPERS Cluster Do?

PAPERS As A Communication Network

Lessons From PAPERS0

Conclusion

Future Work

Significance Of My Contribution

Publications From This Work

Hypertext Index

Clustering
Parallel Processing
Cluster Computing Latencies
Barrier Synchronization
Other Hardware Barriers
Static Vs. Dynamic Barriers
Barrier Groups (Masks)
Theoretical Barrier Work At Purdue
Experimental Barrier Work At Purdue
Original Concept Of CARD Barrier Hardware
Basic CARD DBM Design
Problems With The Basic CARD DBM Design
Improved CARD DBM Design
Improved CARD DBM Design
Why PAPERS?
Generic PAPERS Cluster Concept
What Hardware Interface?
Problems
PAPERS Barrier Logic (For One Processor)
Parallel Interrupts?
Interrupt Architecture For PAPERS
The Two Interrupt Mask Alternatives
Generic PAPERS Block Diagram
PAPERS0 Implementation
PAPERS0 Logic Schematic
PAPERS0 Display Schematic
Performance Of PAPERS0
What Can A PAPERS Cluster Do?
PAPERS As A Communication Network
Lessons From PAPERS0
Conclusion
Future Work
Significance Of My Contribution
Publications From This Work
Hypertext Index